1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device with an isolating region.
2. Description of the Related Art
An isolating region has been used to isolate a plurality of elements that form a semiconductor device. A known example of an isolating region has an STI (Shallow Trench Isolation) structure in which a trench is provided and an insulating material is filled in the trench.
A study has been conducted on a method for filling an insulating material in a trench in an isolating region having an STI structure.
Japanese Patent Laid-Open No. 2008-10724 discloses a method for filling an oxide film (hereinafter referred to as an “HDP oxide film”) in a trench by using the HDP method (High Density Plasma Method).
Japanese Patent Laid-Open No. 2006-269789 discloses an isolating region including a hybrid structure formed of an HDP oxide film and an SOD (Spin on Dielectric) film.
In a miniaturized LSI process, a highly fillable SOD monolayer film is required. “The P-SOG Filling Shallow Trench Isolation Technology for sub-70 nm Device,” J. H. Heo et al., 2003 Symposium on VLSI Technology discloses a method for forming a highly fillable SOD monolayer film.